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G. H. Cho

A 80×60 Micro-Bolometer CMOS Thermal Imager Integrated With a Low-Noise 12-Bit DAC
An Area- and Power-Efficient Interpolation Scheme Using Variable Current Control for 10-Bit Data Drivers in Mobile Active-Matrix LCDs
A CMOS LDO Regulator With High PSR Using Gain Boost-Up and Differential Feed-Forward Noise Cancellation in 65 nm Process
Characterization of Novel Inductive Power Transfer System for On-Line Electric Vehicles
Low-Ripple Hysteretic-Controlled Monolithic Buck Converter With Adapted Switching Frequency for Large Step-Down Ratio Applications
One-Chip Electronic Detection of DNA Hybridization Using Precision Impedance-Based CMOS Array Sensor
A 10-Bit Piecewise Linear Cascade Interpolation DAC With Loop Gain Ratio Control
An Electronic DNA Sensor Chip Using Integrated Capacitive Read-Out Circuit
Efficiency-Enhanced Single-Inductor Boost-Inverting Flyback Converter With Dual Hybrid Energy Transfer Media and a Bifurcation-Free Comparator
A 10-Bit Modified VCC Interpolation and DVO Correction by Drain Current Injection
A Buffer Amplifier With Embodied 4-Bit Interpolation for 10-Bit AMLCD Column Drivers

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