<?xml version="1.0" encoding="utf-8" standalone="yes"?><rss version="2.0" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Mixed-Signal IC | BCAS Lab</title><link>https://www.byunghunlee.com/tag/mixed-signal-ic/</link><atom:link href="https://www.byunghunlee.com/tag/mixed-signal-ic/index.xml" rel="self" type="application/rss+xml"/><description>Mixed-Signal IC</description><generator>Hugo Blox Builder (https://hugoblox.com)</generator><language>en-us</language><lastBuildDate>Mon, 01 Aug 2022 00:00:00 +0000</lastBuildDate><image><url>https://www.byunghunlee.com/media/icon_hu17967106976228004520.png</url><title>Mixed-Signal IC</title><link>https://www.byunghunlee.com/tag/mixed-signal-ic/</link></image><item><title>A 80×60 Micro-Bolometer CMOS Thermal Imager Integrated With a Low-Noise 12-Bit DAC</title><link>https://www.byunghunlee.com/publication/2022-j-tie-cmos-imager/</link><pubDate>Mon, 01 Aug 2022 00:00:00 +0000</pubDate><guid>https://www.byunghunlee.com/publication/2022-j-tie-cmos-imager/</guid><description>&lt;p>&lt;strong>Corresponding authors:&lt;/strong> Byunghun Lee and G. H. Cho&lt;br>
&lt;strong>Journal metrics:&lt;/strong> SCIE Q1, IF 7.503&lt;/p></description></item><item><title>A 10-Bit Piecewise Linear Cascade Interpolation DAC With Loop Gain Ratio Control</title><link>https://www.byunghunlee.com/publication/2010-ic-cicc-blee/</link><pubDate>Wed, 01 Sep 2010 00:00:00 +0000</pubDate><guid>https://www.byunghunlee.com/publication/2010-ic-cicc-blee/</guid><description/></item><item><title>A 10-Bit Modified VCC Interpolation and DVO Correction by Drain Current Injection</title><link>https://www.byunghunlee.com/publication/2010-ic-sid-blee/</link><pubDate>Sat, 01 May 2010 00:00:00 +0000</pubDate><guid>https://www.byunghunlee.com/publication/2010-ic-sid-blee/</guid><description/></item></channel></rss>